The present disclosure herein relates to a sense amplifier and a semiconductor memory device employing the same.
A memory such as a static random access memory (SRAM) or a dynamic random access memory (DRAM) includes a memory element array for storing data and a sense amplifier for amplifying a signal read from the memory element array into a logic level to convert the signal into a logic signal. A typical sense amplifier is provided with a precharging p-type metal oxide semiconductor (PMOS) for precharging a read bit line (RBL) and an inverter for sensing and amplifying a signal read from a memory element. In general, since a complementary metal oxide semiconductor (CMOS) inverter includes a pull-up PMOS transistor and a pull-down n-type metal oxide semiconductor (NMOS) transistor, the precharging PMOS transistor and the PMOS for sensing a signal are individually provided to the typical sense element.
However, such a sense amplifier, which individually includes a precharging PMOS and a PMOS for an inverter, is vulnerable to process variation that causes a change in characteristics (e.g., a threshold voltage) of elements of a semiconductor circuit due to variables that occur when the semiconductor circuit is manufactured. This vulnerability may cause malfunction or operation speed degradation.